
Fresh insights on low latency and high frequency trading. Mostly new relevant technology, C++, FPGA, Verilog, tutorials, short notes and of course, rants. Problem subscribing? Try https://lucisqr.lemonsqueezy.com/buy/c78e2dd6-81c0-44cd-bfa3-13db7158a050
| Platform | Pricing | Freemium | Publishes | Daily | |
|---|---|---|---|---|---|
| Issues | 294 | Founded | 4 years ago | Last Issue | 4 days ago |
| Active | |||||

About fifteen hours of interviewer time per candidate, repeated fifty to a hundred times to fill one role, plus a year of accumulated process drift since anyone last redesigned it. The decision-making instrument that gates a $5-50M outcome...
There is a loop in your decoder that will not go faster, and it is not your fault. You unrolled it, you told the compiler -O3 -march=native, you checked that everything is L1-resident. It sits there at one iteration per load, immovable, whi...
Loop irreducibility is the one performance cliff in C++ that the whole toolchain walks you off in silence. So I wrote a small tool to find them: loop-hunter, an LLVM pass that flags every irreducible loop, points at the two places control e...
Among the major exchanges, the National Stock Exchange of India is the only one I know that ships order identifiers as IEEE-754 doubles. Every other venue I’ve worked with treats an order ID as what it actually is: a monotonically increasin...
The discussion that grew out of Shreyans’s article is best read as a clarification, not a correction. The original piece has the layout of the stack right: the reflex path close to the wire, the application logic a layer back, the controls...
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The writers behind this newsletter.
I earned MSc, PhD in Structural Dynamics, with emphasis in supercomputing. Switched to high frequency trading at Citadel in early 2000s. I work mostly with trading applications. LightQR Suite: www.vitorian.com
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