What are you optimizing for ?
FPRoxComputer Architecture, Computer Arithmetic, RISC-V
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fprox.substack.comLatest Issues
Emulating future RISC-V Vector extensions
Lately, I have been considering the following problem: how to develop an application example for a future RISC-V (Vector) extension with no fast hardware support yet ?
Usually, I would rely on an instruction set simulator (like spike) and...
RISC-V Vector Is Expanding
A little under a year ago (assuming we do not take too long to write this piece) we published a taxonomy of the ratified and some future RISC-V Vector extensions.
There has been a lot of recent activities in this domain and it is time to u...
RISC-V and Post Quantum Cryptography
You may have heard about the Quantum Computers and impending doom they represent for public key cryptography: Q-Day. If you have not, let me refresh your memory.
The computers we used today are called “classical”, they rely on boolean log...
IEEE-754: THE floating-point standard
Recently, the IEEE-754 standard (initially published in 1985) celebrated its 40th birthday. A very nice ceremony was put together by Leonard T. and the local chapter of IEEE at University of California in Berkeley (UCB).
This is as good re...
Micro-Benchmarking a RISC-V SBC (CanMV K230)
In a previous article (more than a year ago), we unpacked Canaan’s CanMV board with a K230 core.
In this post we are going to do some benchmarking on the board.
What are you optimizing for ? (fprox's substack) is a reader-supported publi...
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