Chip Log
SubbuMargin notes from a career in SoC/ASIC engineering
| Platform |  | Pricing | Freemium | Publishes | Weekly |
|---|---|---|---|---|---|
| Issues | 17 | Subscribers | Read | chiplog.io |
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Latest Issues
Recent posts by this newsletter. Browse the email archive.
Analysis of NVIDIA’s Bluefield-4 DPU and KV-Cache Context Memory Storage Platform (CES 2026): Architecture, Strategy, Dynamo, WEKA, Enfabrica
At CES 2026, NVIDIA announced the Context Memory Storage Platform, a new appliance designed to expand KV cache capacity beyond the GPU rack.
A Deep Dive into NVIDIA Rubin CPX: History, Architecture, Splitwise/DistServe, Inference Economics, and Limitations
A first principles analysis of why NVIDIA decided to make this new class of accelerator
Analysis of NVIDIA DGX Spark's GB10 SoC
This article takes a closer look at the Grace-Blackwell GB10 SoC, the chip powering NVIDIA’s newly released DGX Spark. Here’s a quick timeline of how we got here:
5 different ways DRAM and Compute are integrated
Examples of how GDDR, DDR, LPDDR, HBM and 3D DRAM are integrated with compute
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