Silicon Atlas
Evidence-first AI semiconductor analysis across architecture, memory, power, and industry strategy. What new silicon claims prove, where bottlenecks move, and whether gains survive at system and economic scale.
| Platform |  | Pricing | Freemium | Publishes | Twice weekly |
|---|---|---|---|---|---|
| Issues | 18 | Founded | 3 months ago | Last Issue | 8 days ago |
| Active | |||||
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siliconatlas.substack.comLatest Issues
SK hynix’s Next Act: Beyond Supplying HBM
How a cash-rich memory giant can turn custom HBM, advanced packaging and software into a bigger role in AI system design.
Imagine a processor company placing an order with SK hynix. The familiar question is, “How much memory can you delive...
Micron Said No to 4F². Not to Bonding.
What the memory makers’ diverging paths reveal about the race to stacked DRAM
Micron’s DRAM roadmap places a red X beside 4F². The company cites complexity and cost, choosing to extend 6F² while developing 3D DRAM. Yet the same slide place...
Follow the Bytes: 12 Terms for AI Inference Hardware
Making model weights half as large does not necessarily halve the data a GPU must read. Imagine a chatbot serving eight people together. In a simplified decode step, it reads 16 GB of model weights shared by the batch, plus 0.5 GB of contex...
After the Selloff, I Still Favor HBM
More AI systems, more memory per system, and why China’s 4F² DRAM announcement makes me more selective about server DDR5.
This week’s selloff combines a supply scare with doubts about the AI investment boom. Morningstar linked the decline...
AI Agents Need CPUs. Who Gets Paid?
More agents do not give every CPU supplier the same opportunity. Selling more CPUs, charging more for faster cores and selling more memory are three different revenue paths. My first demand call through 2027 is more server DRAM per CPU in f...
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The writers behind this newsletter.
EE PhD. 20 years designing chips. AI hardware explained: bottlenecks, trade-offs, and who gets paid.
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